DDR Test

Create Vivado Project

You can directly add an application project based on the corresponding "hello world" Vivado project. The specific configuration for each DDR parameter will be described later.

Create Vitis Project

Similarly, in Vitis, click File-->new-->Appiacation Project:

Select Zynq DRAM tests:

Debug and Compile

After the project is compiled successfully, connect the development board's JTAG to the computer using a Type-C USB cable. Use another Type-C USB cable to connect the development board's PS UART to the computer.

On the computer, open the serial debugging tool MobaXterm and establish a connection with the development board's PS UART.

Enter debug mode in Vitis: Under Debug As, select the first option. Run at full speed to see the debugging information through the serial port.

The debugging results are as follows:

An explanation of the test results will be provided later.